Cisco VIP2-50 : Versatile Interface Processor 2, Model 50

The VIP2-50 is designed for the most demanding environments with increased processor performance and very large SDRAM and SRAM memory options. It offers 35-to 50 percent greater distributed switching performance over VIP2-40 due to its 200 MHZ MIPS R5000 processor. In addition, the enhanced-memory architecture of the VIP2-50 allows large packet memory (SRAM) options. This feature supports environments with long round-trip propagation delays for wide-area network links and environments that use distributed IP Services such as Distributed Weighted RED (D-WRED) and Distributed Committed Access Rate (D-CAR) queuing systems. Large program (DRAM) memory options enable support for new switching methodologies such as CEF that eliminate performance bottlenecks caused by random destination addressing typically found in the Internet and large enterprise networks.